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Admissions · 2027 intake

SUTD’s 2027 IC Design, Failure Analysis and Reliability master’s programme opens for applications, in partnership with Wintech-Nano

12 months full-time, a core semiconductor specialisation, with a lab internship at Wintech-Nano; five interview batches from November 2026. Programme highlights, application rhythm, and both partners explained.

The SUTD campus in Singapore

Programme highlights, application batches and both partners

The Master of Science in Technology and Design run by the Singapore University of Technology and Design (SUTD) with Wintech-Nano — the IC Design, Failure Analysis and Reliability track — has opened its 2027 intake and published its interview schedule. Below we set out the programme highlights, the application rhythm and both partners’ background, for students and parents considering an application.

What the programme is

This is one track of SUTD’s Master of Science in Technology and Design (MTD), run jointly with Wintech-Nano: 12 months full-time, focused on IC design, failure analysis (FA) and reliability analysis (RA). According to SUTD’s programme page, the academic leads are Dr Cheah Chin Wei and Dr Shubhaya Kalya of the Science, Mathematics and Technology cluster. Students have the opportunity to intern at the programme partner’s laboratory in Suzhou, connecting classroom theory to real analytical equipment and production lines.

Inside the SUTD library
The SUTD library — timber floors and open shelving, where students study day to day. 照片:Smuconlaw / Wikimedia Commons · CC BY-SA 4.0

Why it is a core semiconductor specialisation

Failure analysis and reliability analysis are unavoidable steps between chip design and volume production: why a chip failed, where a material went wrong, whether a product passes reliability qualification — all of it is answered by testing and analysis. As AI, 5G and chiplet technologies advance, demand for people in this field keeps rising. In its programme write-up, Wintech-Nano cites an industry forecast that the global semiconductor talent gap will reach around 200,000 by 2025, with the analysis segment — high in technical barriers and specialisation — showing an even sharper shortfall.

SUTD teaching buildings and elevated walkways
SUTD’s teaching buildings — stepped levels and planted walkways, the campus’s signature language. 照片:Smuconlaw / Wikimedia Commons · CC BY-SA 4.0

Nine points from the programme and its recruiters

1 A core semiconductor specialisation; 2 aimed at students with a science or engineering background; 3 English requirements can be adjusted to the student’s circumstances; 4 full tuition loan available; 5 students admitted to the SUTD master’s can receive an employer pre-employment agreement; 6 legal part-time work during study, with the qualification eligible for Chinese overseas-study certification (留服认证); 7 designed as a closed loop of “study abroad — upgrade your qualification — support yourself — future employment”; 8 a route towards the world’s leading chip companies; 9 a possible path to Singapore permanent residency, even citizenship. These are the points published by the programme and its recruiters; the actual admission conditions, loan and employment terms, and all visa and immigration arrangements are governed by the formal documents of the university, the company and Singapore government agencies.

What to prepare before applying

The 2027 intake runs in five rolling batches from November 2026 to June 2027. Cut-off and interview dates (subject to the university’s final notice): batch 1 closes 13 Nov 2026, interviews 16–20 Nov; batch 2 closes 15 Jan 2027, interviews 18–23 Jan; batch 3 closes 5 Mar 2027, interviews 8–12 Mar; batch 4 closes 30 Apr 2027, interviews 3–7 May; batch 5 closes 31 May 2027, interviews 31 May – 4 Jun. The earlier the batch, the more time you have for documents and language scores — we suggest trying for the first batch.

The 2027 intake: five batches and interview dates

For a master’s application like this, we suggest preparing early: undergraduate transcripts and degree certificate, an English test score (even if the programme says it can be adjusted to the student, confirm the university’s final requirement early), reference letters, a personal statement and CV, plus projects or internships that show your science or engineering background. Batch 1 closes on 13 November 2026; if you still need to sit a language test, batch 2 (15 January 2027) is more comfortable.

2027 intake interview schedule
Cut-off and interview dates for the five 2027 batches (schedule published by the recruiters).

About Wintech-Nano

Wintech-Nano is a specialist third-party laboratory in semiconductor analysis and testing, known in the industry as the “chip general hospital”. The company began in Singapore in 2004; its founder Li Xiaomin graduated from Peking University in microelectronics in 1998, took a master’s in microelectronics at the National University of Singapore in 2001, and worked at Singapore’s Agency for Science, Technology and Research (A*STAR). In 2012 he returned to found Wintech-Nano (Suzhou) Co., Ltd in Suzhou Industrial Park, now listed on China’s STAR Market (ticker 688757.SH) and the group’s operating and technology centre.

The company provides one-stop analysis services to the semiconductor chain: materials analysis (MA), failure analysis (FA), reliability analysis (RA), destructive physical analysis (DPA), automotive-grade chip testing and R&D-assisted TD. Its customers span chip design, wafer foundry, packaging and testing, materials, equipment makers and end products; it has served more than 2,000 companies worldwide and is an important partner of Xilinx in Asia-Pacific. Its equipment list includes CT/C-SAM, NanoProbe, Thermal/EMMI/OBIRCH, HR-TEM, FIB/PFIB, SEM, D-SIMS, TOF-SIMS, XPS and AFM, with 24/7 service; the team has published over 80 papers and holds more than 20 granted patents. The company also proposes the Labless concept — moving the “necessary but non-core” R&D analysis work out of individual companies to specialist third-party platforms.

Wintech-Nano’s talent partnership with SUTD is already under way: according to its own website, the first cohort of jointly trained ICDFAR students has been invited to SUTD’s graduation ceremony.

Indoor greenery in the SUTD library
The green seating inside SUTD’s library — the campus brings greenery indoors. 照片:Smuconlaw / Wikimedia Commons · CC BY-SA 4.0

About SUTD

SUTD is Singapore’s fourth public university. Its first students started in 2012, with the curriculum planned in collaboration with MIT, and it is known for combining design and technology; the campus is in Upper Changi.

Who should apply · our advice

If you have a science or engineering background (electronics, microelectronics, materials, physics, mechanical engineering, automation and so on) and want to move into the core technical side of the semiconductor industry, this track is clearly positioned: a 12-month master’s + lab internship + a hiring channel with a partner company. One caution: anything involving “loans, pre-employment agreements or permanent residency” should be judged on formal documents — we suggest asking about each clause before applying rather than relying on marketing language.

On the “full tuition loan” and “employer pre-employment agreement” mentioned in the programme materials, we suggest asking the recruiters for written terms at application stage: which party provides the loan, at what interest and repayment schedule, under what conditions the pre-employment agreement takes effect, and where the future role is located. Permanent residency and citizenship fall under Singapore’s immigration policy; no university or company can promise them, and they should be understood as a long-term possibility.

Recruitment poster (click to enlarge · downloadable)

The poster: IC Design, Failure Analysis and Reliability (with an employment intent letter) is the highlighted track; it also lists Cybersecurity, Data Science, Robotics & Automation, HealthTech Innovation, Advanced IC Design and Technology, Architectural Design Computation, Human-Centred Design and Sustainable Urban Design as English-taught options, plus two bilingual tracks in AI for education and finance. (A recruitment leaflet; batch dates for the 2027 intake follow the university’s official announcement.)
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Thinking of applying?

We can help with admission requirements, documents and interview arrangements; for official information you can also contact the programme directly (Wintech-Nano semiconductor academy: MTD@wintech-nano.com).